Credits: 1 unit (4 credit hours)
Contact Hours: 3 lecture & 3 lab
Instructor: Professor Jeffrey O. Pfaffmann
Last Taught: Fall 2013
Text Book: Computer Systems: A Programmer’s Perspective, 2/E
By Byrant and O’Hallaron. (Addison-Wesley, 2010.)
C: In a Nutshell. Second Edition.
By Peter Prinz & Tony Crawford. (O’Reilly Media, 2015.)
Description: A study of digital logic, computer components, internal and external memory, instruction sets, interrupts, micro- and macro-programming. Lecture/laboratory.
Prerequistes: CS150 (Data Structures and Algorithms)

Specific Course Goals:

After successfully completing this course, the student will be able to:

  • Develop a machine-level understanding of C, analyzing and enhancing programs to improve performance.
    (ABET/CAC Outcome A)
  • Discuss the behavior of the computer memory hierarchy and different processor designs and design implementation.
    (ABET/CAC Outcome A)
  • Understand and present material on understanding combinational circuits.
    (ABET/CAC Outcome A)
  • Read and explain a contemporary conference paper related to computer architecture.
    (ABET/CAC Outcome H)

Student Outcomes:

  ABET/CAC Outcome A An ability to apply knowledge of computing and mathematics appropriate to the program’s student outcomes and to the discipline.
  ABET/CAC Outcome H Recognition of the need for and an ability to engage in continuing professional development.

Topics covered:

  • Overview of Computer Organization from OS to Gate.
  • Information Representation
  • C to Assembly in x86 and x86-64
    • Mapping from C to Assembly to Machine Code
    • Data Formats
    • Arithmetic and Logical Operations
    • Control Structures
    • Procedures
    • Array Allocation and Access
    • Higher-Level Data Structures
  • Circuit Design
    • Boolean Algebra
    • Combinational Circuits
  • Multiplexer, Demultiplexer, Encoder, and Decoder
  • Half, Full, Ripple Adder, and Arithmetic-Logic Units
    • Sequential Circuit Design and Usage
  • Clocking Signals, Latches, and Flip-Flops
  • Counters
  • Registers
    • Architecture Components
  • Data Buses, Register Files, and Control Basics
  • Hardwired Control Logic
  • Micro-Code Control Logic
  • Basic Memory
  • Instruction Set Architecture Basics
    • Serial Processor Design and Operation
  • Design Tradeoff and Machine Speedup
  • RISC Design Characteristics
  • CISC Design Characteristics
    • Pipelined Processor Design and Operation
    • Super-Scalar Processor Design and Operation
  • Memory Hierarchy
    • Two-Level Hierarchy and Speedup
    • Caching
    • Paging
    • Disk Performance